Analog switches and methods for controlling analog switches
US9621156B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 17, 2013 |
| Grant date | Apr 11, 2017 |
| Priority date | — |
| Expiry date | May 27, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0018
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog switch may be maintained reliably in an off state. The switch comprises: a P-type first transistor having a source, a drain and a gate, a N-type second transistor having a source, a drain and a gate, and a switch control circuit to drive the gates of the first and second transistors. The drain of the first transistor and the source of the second transistor are connected at a first node, and the source of the first transistor and the drain of the second transistor are connected at a second node. When the voltage at the first or second nodes falls outside of a supply voltage range of the switch control circuit, the switch control circuit is operable, in response to a signal to make the switch high impedance, by adjusting the gate voltages of the first transistor and the second transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.