Patent · US Active

Method for manufacturing a circuit board structure

US9622354B2 · kind B2 · utility

1Cited by

62References

14Claims

0Family size

Assignee

GE Embedded Electronics Oy · FI

Inventors

Risto Tuominen · Espoo, FI
Antti Iihola · Helsinki, FI
Petteri Palm · Regensburg, DE

Key dates

Filing date	Nov 11, 2013
Grant date	Apr 11, 2017
Priority date	—
Expiry date	Nov 7, 2034

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY10T29/4913
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method for manufacturing a circuit-board structure wherein a conductor foil is provided on an insulating material layer, a resist layer is spread on the conductor foil and a recess formed in the conductor foil and insulating material layer. The resist layer is patterned to form a conductor-pattern having openings wherein conductor patterns may be grown. A component is attached to the conductor foil and conductor pattern and conductor material is removed which does not form part of a conductor pattern.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.