Test generation using expected mode of the target hardware device
US9626267B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2015 |
| Grant date | Apr 18, 2017 |
| Priority date | — |
| Expiry date | Apr 18, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/263
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, apparatus and product for test generation. The method comprises generating a first set of instructions for a hardware component, that are to be executed when operating in a first mode of operation; in response to a parsed template statement being a marker statement, generating an intermediary set of one or more instructions to cause the hardware component to change the mode of operation to a second mode in accordance with the marker instruction, and modifying the expected mode of the hardware component to a second mode; and generating a second set of instructions for the hardware component, that are to be executed when operating in the second mode of operation. The generation of instructions comprises determining the expected mode and generating instructions in accordance with the expected mode of the hardware component. The generation is performed without having an expected full state of the hardware component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.