Semiconductor device and method of fabricating the same
US9627509B2 · kind B2 · utility
5Cited by
9References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2015 |
| Grant date | Apr 18, 2017 |
| Priority date | — |
| Expiry date | Jul 17, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a substrate with an active pattern, a gate electrode provided at the active pattern, and a gate capping structure disposed above the gate electrode. The gate capping structure may include two or more gate capping patterns with different properties from each other, and the use of the gate capping structure makes it possible to form contact plugs in a self-aligned manner and improve operational speed and characteristics of the semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.