Well-tap structures for analog matching transistor arrays

US9627529B1 · kind B1 · utility

Assignee

• Altera Corporation · US

Inventors

• Yue Teng Tang · Bayan Lepas, MY
• Albert Kordesch · San Jose, US

Key dates

• Filing date: May 21, 2015
• Grant date: Apr 18, 2017
• Expiry date: May 21, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/60

Abstract

In one embodiment, an integrated circuit includes an array of active structures, an array of dummy structures and multiple well-tap structures. The array of dummy structures surrounds the array of active structures. The well-tap structures may be interposed between the array of active structures and the array of dummy structures. In one embodiment, each of the well-tap structures may include a well, a diffusion region and a gate-like structure. The well may be formed in a substrate and is of a first doping type. The diffusion region may be formed in the well and is also of the first doping type. The gate-like structure may be formed above the substrate and adjacent to the diffusion region.