Techniques and methods for aliasing digital beamformers for reduced computational loads
US9628162B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2016 |
| Grant date | Apr 18, 2017 |
| Priority date | — |
| Expiry date | Sep 21, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B7/086
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A phased array receiver for use with a first received analog signal and a second received analog signal, the phased array receiver including: a first analog to digital converter to generate a first received digital signal; a second analog to digital converter to generate a second received digital signal; a first down-sampler to generate a first down-sampled digital signal; a second down-sampler to generate a second down-sampled digital signal; a first polyphase low pass filter to generate a first filtered down-sampled received digital signal; a second polyphase low pass filter to generate a second filtered down-sampled received digital signal; and a beamforming core to generate a beamformed signal, wherein the first received signal is related to the first filtered down-sampled received digital signal, and wherein the second received signal is related to the second filtered down-sampled received digital signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.