Wafer scale monolithic CMOS-integration of free- and non-free-standing Metal- and Metal alloy-based MEMS structures in a sealed cavity
US9630834B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2014 |
| Grant date | Apr 25, 2017 |
| Priority date | — |
| Expiry date | Jun 16, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/05014
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
An assembly of metallic MEMS structures directly fabricated on planarized CMOS substrates, containing the application-specific integrated circuit (ASIC), by direct deposition and subsequent microfabrication steps on the ASIC interconnect layers, with integrated capping for packaging, is provided. The MEMS structures comprise at least one MEMS device element, with or without moveable parts anchored on the CMOS ASIC wafer with electrical contact provided via the metallic interconnects of the ASIC. The MEMS structures can also be made of metallic alloys, conductive oxides and amorphous semiconductors. The integrated capping, which provides a sealed cavity, is accomplished through bonding pads defined in the post-processing of the CMOS substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.