Latch and panels of computing systems
US9632540B2 · kind B2 · utility
4Cited by
10References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 16, 2015 |
| Grant date | Apr 25, 2017 |
| Priority date | — |
| Expiry date | Nov 20, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49815
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A latch having an idle position, a first position, and a second position is associated with a first panel and a second panel of a computing system. The first panel is associated with the latch being positioned in the first position. The second panel is associated with the latch being positioned in the second position.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.