Instruction and logic for processing text strings
US9632784B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2014 |
| Grant date | Apr 25, 2017 |
| Priority date | — |
| Expiry date | May 12, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/452
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor includes a decoder logic to decode a compare instruction, and an execution unit to execute the compare instruction. The compare instruction is to cause the processor to determine whether each 32-bit floating point data element of first and second SIMD floating point operands is valid, compare only valid 32-bit floating point data elements of the first 64-bit SIMD floating point operand with only valid 32-bit floating point data elements of the second 64-bit SIMD floating point operand in the same data element position, and store indicators of whether the compared valid 32-bit floating point data elements of the first and second 64-bit SIMD floating point operands are equal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.