Maintaining coherence when removing nodes from a directory-based shared memory system
US9632934B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 14, 2013 |
| Grant date | Apr 25, 2017 |
| Priority date | — |
| Expiry date | Jun 21, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1032
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A high performance computing system and methods are disclosed. The system includes logical partitions with physically removable nodes that each have at least one processor, and memory that can be shared with other nodes. Node hardware may be removed or allocated to another partition without a reboot or power cycle. Memory sharing is tracked using a memory directory. Cache coherence operations on the memory directory include a test to determine whether a given remote node has been removed. If the remote node is not present, system hardware simulates a valid response from the missing node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.