Multistage amplifier circuit with improved settling time
US9634617B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 2, 2015 |
| Grant date | Apr 25, 2017 |
| Priority date | — |
| Expiry date | Jul 2, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/7206
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Described examples include multistage amplifier circuits having first and second forward circuits, a comparator or sensor circuit coupled to sense a signal in the second forward circuit to identify nonlinear operation or slewing conditions in the multistage amplifier circuit, and one or more sample hold circuits operative according to a sensor circuit output signal to selectively maintain the amplitude of an amplifier input signal in the second forward circuit and/or in a feedback circuit in response to the sensor circuit output signal indicating nonlinear operation or slewing conditions in the multistage amplifier circuit. Certain examples further include a clamping circuit operative to selectively maintain a voltage at a terminal of a Miller compensation capacitance responsive to the comparator output signal indicating nonlinear operation or slewing conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.