Reconfigurable system-on-chip and related methods
US9634669B2 · kind B2 · utility
2Cited by
3References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2015 |
| Grant date | Apr 25, 2017 |
| Priority date | — |
| Expiry date | Dec 16, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/507
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit includes combinational circuit and sequential circuit elements coupled thereto. The circuit includes a multiplexor coupled to the combinational and sequential circuit elements, and a system register is coupled to the multiplexor. At least one portion of the combinational and sequential circuit elements is configured to selectively switch to operate as a random access memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.