Analog-to-digital conversion with linearity calibration
US9634681B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2016 |
| Grant date | Apr 25, 2017 |
| Priority date | — |
| Expiry date | Jul 27, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/60
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The embodiments described herein provide analog-to-digital converters (ADCs) and systems and methods for calibrating ADCs, including ADCs with poorly characterized nonlinearities that cannot be effectively calibrated with traditional calibration techniques. In general, the embodiments described herein calibrate by measuring output values from an ADC with a known calibration input values being applied. The measured output values are used to determine localized polynomial interpolants. Each of the determined localized polynomial interpolants is then evaluated at an uncorrected output value, and the evaluated localized polynomial interpolants are then used to generate correction values. These correction values can then be used to calibrate the ADC during later operation. Such a calibration technique can provide effective calibration for a variety of ADCs, including ADCs that use inverter-based voltage-to-current (VI) converters and current-controlled ring oscillators.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.