Utilizing chip-on-glass technology to jumper routing traces
US9639214B2 · kind B2 · utility
1Cited by
21References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 22, 2013 |
| Grant date | May 2, 2017 |
| Priority date | — |
| Expiry date | Dec 22, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A chip-on-glass device comprises a chip-on-glass substrate, a metal layer, and a plurality of chip-on-glass connection bumps. The metal layer comprises a plurality of passive jumper routing traces. The plurality of chip-on-glass connection humps is coupled with passive jumper routing traces of the plurality of passive jumper routing traces.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.