Double-linked lists with reference counters
US9639270B2 · kind B2 · utility
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18Claims
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Key dates
| Filing date | Jun 16, 2015 |
| Grant date | May 2, 2017 |
| Priority date | — |
| Expiry date | Oct 8, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F5/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system includes, in a first memory location, a pointer to a next one of the plurality of memory locations and a respective reference counter, in each of respective ones of a plurality of memory locations, a pointer to a next one of the plurality of memory locations, a pointer to a previous one of the plurality of memory locations, and a reference counter, and in a last memory location, a pointer to a previous one of the plurality of memory locations and a respective reference counter, and atomically incrementing and decrementing of a reference counter stored in one of the plurality of memory locations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.