Shift register unit and gate driving circuit
US9640276B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 11, 2013 |
| Grant date | May 2, 2017 |
| Priority date | — |
| Expiry date | Sep 25, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to the technical field of communication. There is provided a shift register unit and a gate driving circuit for decreasing noise interferences, enhancing stability of the shift register unit, and at the same reducing the size of the shift register unit. The shift register unit comprises: an input module configured to provide a first voltage signal to an output terminal in response to an input signal; a reset module configured to provide a second voltage signal to a first node as an output terminal of the input module in the input module in response to a reset signal; an output module configured to provide a first clock signal to the output terminal in response to a voltage at a first node; a pull-down control module configured to provide a second clock signal to a second node in response to the second clock signal and provide a power supply negative voltage to the second node in response to the voltage at the first node or the voltage at the output terminal; and a pull-down module configured to provide the power supply negative voltage to the first node and the output terminal in response to the voltage at the second node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.