Semiconductor structure and fabrication method thereof
US9640446B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 2015 |
| Grant date | May 2, 2017 |
| Priority date | — |
| Expiry date | Nov 20, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a semiconductor structure is provided. The method includes providing a semiconductor substrate; and forming a plurality of semiconductor devices on the semiconductor substrate. The method also includes forming a dielectric layer covering the plurality of the semiconductor devices on the semiconductor substrate; and forming an optical auxiliary layer configured to reflect a portion of a levelness-detecting light and absorb a portion of the levelness detecting light transmitting through the optical auxiliary layer during a levelness-detecting process over the dielectric layer. Further, the method includes forming a photoresist layer over the optical auxiliary layer; and detecting a levelness of the semiconductor substrate and exposing the photoresist layer to form a patterned photoresist layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.