Doping method for array substrate and manufacturing equipment of the same
US9640569B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2014 |
| Grant date | May 2, 2017 |
| Priority date | — |
| Expiry date | Jul 21, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0274
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A doping method for an array substrate and a manufacturing equipment. The doping method comprises: using a halftone mask to form a photoresist pattern layer on a gate insulation layer of a substrate; wherein, a polysilicon pattern layer is disposed on the substrate; the gate insulation layer covers the polysilicon pattern layer; the photoresist pattern layer corresponding to a heavily doping region forms a hollow portion; the photoresist pattern layer corresponding to a lightly doping region forms a first photoresist portion; the photoresist pattern layer corresponding to an undoped region forms a second photoresist portion; the first photoresist portion is thinner than the second photoresist portion; and performing one doping process to the polysilicon pattern layer such that the heavily doping region and the lightly doping region of the polysilicon pattern layer are formed simultaneously in order to reduce the manufacturing process of an LTPS array substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.