Multi-level inverter apparatus and method
US9641098B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 12, 2015 |
| Grant date | May 2, 2017 |
| Priority date | — |
| Expiry date | Jun 7, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M7/487
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An inverter comprises a first input capacitor and a second input capacitor connected in series, an inverting unit comprising a first switch, a second switch, a third switch and a fourth switch connected in series, wherein the inverting unit is connected to an input of an L-C filter, a first bidirectional conductive path connected between a common node of the first switch and the second switch, and a common node of the first input capacitor and the second input capacitor, a second bidirectional conductive path connected between a common node of the third switch and the fourth switch, and the common node of the first input capacitor and the second input capacitor and a flying capacitor connected between the common node of the first switch and the second switch, and the common node of the third switch and the fourth switch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.