Field repairable logic
US9645882B2 · kind B2 · utility
0Cited by
7References
9Claims
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Assignee
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Key dates
| Filing date | Jul 23, 2008 |
| Grant date | May 9, 2017 |
| Priority date | — |
| Expiry date | Dec 19, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A state matcher for a logic circuit may detect at least one of a buggy state of the logic circuit, a precursor to a buggy state of the logic circuit and a verified state of the logic circuit based on a plurality of signal values indicative of a state of the logic circuit. A recovery controller for a microprocessor may reconfigure the microprocessor to a trusted feature mode in response to receiving a signal indicating that the microprocessor is in a predefined state and operate the microprocessor in the trusted feature mode for a predetermined period of time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.