Semiconductor memory device having selective ECC function
US9646718B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 3, 2015 |
| Grant date | May 9, 2017 |
| Priority date | — |
| Expiry date | Jun 20, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/4062
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device having a selective error correction code (ECC) function is provided. The semiconductor memory device divides a memory cell array into blocks according to data retention characteristics of memory cells. A block in which there are a plurality of fail cells generated at a refresh rate of a refresh cycle that is longer than a refresh cycle defined by the standards of the semiconductor device is selected from among the divided blocks. The selected block repairs the fail cells by performing the ECC function. The other blocks repair the fail cells by using redundancy cells. Accordingly, a refresh operation is performed on the memory cells of the memory cell array at the refresh rate of the refresh cycle that is longer than the refresh cycle by the standards of the semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.