Interconnection structure, fabricating method thereof, and exposure alignment system

US9646865B1 · kind B1 · utility

Assignees

• Semiconductor Manufacturing International (Beijing) Corporation · CN
• Semiconductor Manufacturing International (Shanghai) Corporation · CN

Inventors

• Qiang Zhang · Dalian, CN
• Bin Xing · Hillsboro, US
• Jing An Hao · Shanghai, CN

Key dates

• Filing date: Oct 26, 2016
• Grant date: May 9, 2017
• Expiry date: Oct 26, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2223/54426
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

In some embodiments, an interconnection structure, an exposure alignment system, and a fabricating method thereof are provided. The method comprises: providing a wafer, forming a first to-be-connected member and multiple first alignment members in a first conductive layer; form a first opening and multiple second alignment members in a first mask layer, the first opening is used to define a position of a second to-be-connected member; based on reference and measurement coordinates of the first alignment members, and reference coordinates and measurement coordinates of the second alignment members, obtaining wafer coordinates for characterizing a position deviation of the wafer; obtaining adjustment compensation values according to stacking offsets of a preceding wafer; adjusting a position of the wafer; forming the interconnection structure in a first dielectric layer and a second dielectric layer to electrically interconnect the first to-be-connected member and the second to-be-connected member.