Paired edge alignment
US9646902B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2013 |
| Grant date | May 9, 2017 |
| Priority date | — |
| Expiry date | Jan 22, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Among other things, one or more systems and techniques for scanner alignment sampling are provided. A set of scan region pairs are defined along a periphery of a sampling area associated with a semiconductor wafer. Alignment marks are formed within scan regions of the set of scan region pairs, but are not formed within other regions of the sampling area. In this way, scan region pairs are scanned to determine alignment factors for respective scan region pairs. An alignment for the sampling area, such as layers or masks used to form patterns onto such layers, is determined based upon alignment factors determined for the scan region pairs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.