Dual-gate array substrate, display panel and display device
US9647007B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 24, 2016 |
| Grant date | May 9, 2017 |
| Priority date | — |
| Expiry date | May 24, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/121
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A dual-gate array substrate, a display panel and a display device are provided. The dual-gate array substrate includes a plurality of pixel unit pairs arranged in an array, every pixel unit pair including a first pixel unit and a second pixel unit, and the first pixel unit and the second pixel unit sharing a data line disposed there-between; a common electrode line disposed between every two adjacent pixel unit pairs in a row direction; a first strip structure disposed between the first pixel unit and the data line; a second strip structure disposed between the second pixel unit and the data line; and a first cross structure, a second cross structure and an intermediate cross structure electrically connecting the first strip structure to the second strip structure. The first cross structure and the second cross structure are disposed at two sides of the intermediate cross structure, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.