Semiconductor devices with graded dopant regions
US9647070B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 3, 2015 |
| Grant date | May 9, 2017 |
| Priority date | — |
| Expiry date | Nov 3, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/211
Abstract
Most semiconductor devices manufactured today, have uniform dopant concentration, either in the lateral or vertical device active (and isolation) regions. By grading the dopant concentration, the performance in various semiconductor devices can be significantly improved. Performance improvements can be obtained in application specific areas like increase in frequency of operation for digital logic, various power MOSFET and IGBT ICS, improvement in refresh time for DRAM's, decrease in programming time for nonvolatile memory, better visual quality including pixel resolution and color sensitivity for imaging ICs, better sensitivity for varactors in tunable filters, higher drive capabilities for JFET's, and a host of other applications.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.