Thin film transistor and method of manufacturing the same
US9647141B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Apr 14, 2016 |
| Grant date | May 9, 2017 |
| Priority date | — |
| Expiry date | Apr 14, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
Abstract
Embodiments of the present disclosure provide a thin film transistor (TFT) and a method of manufacturing the same, which enables to decrease the vertical resistance from the source and the drain to the polarity inversion region, so that the current from the source and the drain to the polarity inversion region may be increased, thereby improving the performances of the TFT. An active layer of the TFT is provided with a first groove and a second groove which neither pass through the active layer. A source and a drain of the TFT are formed at least partially in the first groove and the second groove, respectively. The source and the drain contact the active layer through the first groove and the second groove, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.