Reduced sleep current in power converters
US9647545B2 · kind B2 · utility
0Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 20, 2014 |
| Grant date | May 9, 2017 |
| Priority date | — |
| Expiry date | Jul 17, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/70
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A low standby power DC-DC converter can be powered down during standby mode. The DC-DC converter can be periodically awakened between sleep cycles to check if the output voltage needs to be recharged (refreshed). The duration of the sleep cycles can be varied to accommodate for changing load conditions that would affect the output voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.