System and method of encoding in a serializer/deserializer
US9647688B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2014 |
| Grant date | May 9, 2017 |
| Priority date | — |
| Expiry date | Aug 3, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/31
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method of encoding a data word in a physical coding sublayer before serial transmission is provided, where data words comprising data bits are received, and the data words encoded using one or more 8B/10B encodings to generate 8B/10B transmission characters. ECC check bits are then generated, and the transmission characters and ECC check bits DC balanced prior to shuffling the bits together to form an encoded word to be transmitted. A receiver may decode by implementing a decode process with error correction. In some embodiments 26 data bits from two 13-bit word are encoded into a 40-bit encoded word. Bits of two or more encoded words may be interleaved for transmission, or multiple copies of encoded words sent. An integrated circuit serializer/deserializer comprises hardware to perform encoding and/or decoding. A hardware functional verification system may also implement the disclosed encoding/decoding for interconnections between emulation chips.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.