Signal processing system and integrated circuit comprising a prefetch module and method therefor
US9652413B2 · kind B2 · utility
0Cited by
8References
19Claims
0Family size
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Key dates
| Filing date | Jul 20, 2009 |
| Grant date | May 16, 2017 |
| Priority date | — |
| Expiry date | Jul 21, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0862
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A signal processing system comprising at least one master device at least one memory element and prefetch module arranged to perform prefetching from at least one memory element upon a memory access request to the at least one memory element from the at least one master device. Upon receiving a memory access request from the at least one master device, the prefetch module is arranged to configure the enabling of prefetching of at least one of instruction information and data information in relation to that memory access request based at least partly on an address to which the memory access request relates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.