Nanostructured dielectric materials for high energy density multi layer ceramic capacitors
US9652569B2 · kind B2 · utility
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Key dates
| Filing date | Mar 19, 2012 |
| Grant date | May 16, 2017 |
| Priority date | — |
| Expiry date | Sep 11, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/3323
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A high energy density multilayer ceramic capacitor, having at least two electrode layers and at least one substantially dense polycrystalline dielectric layer positioned therebetween. The at polycrystalline dielectric layer has an average grain size of less than about 300 nanometers, a particle size distribution of between about 150 nanometers and about 3 micrometers, and a maximum porosity of about 1 percent. The dielectric layer is selected from the group including TiO2, BaTiO3, Al2O3, ZrO2, lead zirconium titanate, and combinations thereof and has a breakdown strength of at least about 1100 kV per centimeter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.