Thin film transistor, manufacturing method thereof and array substrate
US9653284B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2014 |
| Grant date | May 16, 2017 |
| Priority date | — |
| Expiry date | Jul 25, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N30/708
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A thin film transistor, a manufacturing method thereof and an array substrate are provided. The thin film transistor comprises: a gate electrode (11), a source electrode (15) and a drain electrode (16), and the thin film transistor further comprises a buffer layer (11) which is directly provided at one side or both sides of at least one of the gate electrode (11), the source electrode (15) and the drain electrode (16), wherein, the buffer layer (11) and at least one of the gate electrode (11), the source electrode (15) and the drain electrode (16) directly contacting the buffer layer (11) are conformal. Therefore, the adhesion between an electrode of the thin film transistor and a film layer contacting it is improved and at the same time an atom in the electrode of the thin film transistor is effectively prevented from diffusing to the film layer connected with it, and the reliability of the thin film transistor is improved and the production cost is reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.