Device isolation structure and manufacture method

US9653344B2 · kind B2 · utility

Assignee

• Semiconductor Manufacturing International (Shanghai) Corporation · CN

Inventors

• Guangli Yang · Nanhu, CN
• Xianyong Pu · Shanghai, CN
• Li-Jung Liu · Shanghai, CN
• Chihchung Tai · Shanghai, CN
• Gangning Wang · Shanghai, CN
• Hong Wei Sun · Beijing, CN

Key dates

• Filing date: Oct 13, 2015
• Grant date: May 16, 2017
• Expiry date: Oct 13, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L23/552
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for forming a semiconductor device includes forming a buried doped layer in a semiconductor substrate and forming a plurality of first trenches that expose the buried doped layer. A first dielectric layer is formed covering sidewalls of the first trenches, and a doped polysilicon layer is formed covering side surfaces of the first dielectric layer and bottom portions of the first trenches. The method also includes forming a second trench in each of the plurality of first trenches, each second trench extending through a bottom portion of the doped polysilicon layer and the buried doped layer into a lower portion of the substrate. The method also includes forming a second dielectric layer inside each second trench. An isolation pocket structure is formed that includes the doped buried layer at the bottom and sidewalls that includes the doped polysilicon layer sandwiched between the first and second dielectric layers.