Systems and methods for protecting data using reconfigurable logic paths
US9654111B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2015 |
| Grant date | May 16, 2017 |
| Priority date | — |
| Expiry date | Mar 16, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17736
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Various embodiments of the invention allow to protect data in a logic circuit from being detected by commonly known observation methods. In certain embodiments, this is accomplished by selecting a set of reconfigurable logic blocks within the logic circuit to form a routing path in such a manner that the circuit performs a given function while making it virtually impossible to follow data through the circuit as the data is being processed. The routing path may be selected in a random or pseudorandom fashion, for example, in response to detecting an environmental change. In some embodiments, known data is injected into the logic path and the output is compared to a known value. If the result is incorrect, for example, because a section of the hardware ceased to properly perform due to a faulty circuit component, signals are routed through an operational part of the circuit to provide a different and valid logic path, while avoiding faulty logic gates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.