Analog-to-digital converters for successive approximation incorporating delta sigma analog-to-digital converters and hybrid digital-to-analog with charge-sharing and charge redistribution
US9654130B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2016 |
| Grant date | May 16, 2017 |
| Priority date | — |
| Expiry date | Jul 14, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/322
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An A/D converter including a sample and hold circuit, first and second A/D converters and a combination circuit. The sample and hold circuit samples an analog input signal to generate bits. The first A/D converter generate a first digital signal based on the analog input signal and includes charge-sharing and charge-redistribution D/A converters that convert respectively a most-significant-bit and a first least significant bit. The first digital signal is generated based on outputs of the charge-sharing and charge redistribution D/A converters. The second A/D converter generates a second digital signal based on an output of the first A/D converter and includes a delta sigma D/A converter, which converts a second least significant bit. The second digital signal is generated based on an output of the delta sigma D/A converter. The second A/D converter is a fine conversion A/D converter relative to the first A/D converter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.