Patent · US Active

Capacitor order determination in an analog-to-digital converter

US9654131B1 · kind B1 · utility

6Cited by
6References
2Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 26, 2016
Grant dateMay 16, 2017
Priority date
Expiry dateFeb 26, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M7/165
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

An analog-to-digital converter (ADC) includes a digital-to-analog converter (DAC) that has a configurable capacitor array. Based on measurements of differential nonlinearity (DNL) and/or integral nonlinearity (INL) error by an external test computer system, an order for use of the DAC's capacitors can be determined so as to reduce DNL error aggregation, also called INL. The DAC includes a switch matrix that can be programmed by programming data supplied by the test computer system.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.