Sending messages in a network-on-chip and providing a low power state for processing cores
US9658676B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 19, 2015 |
| Grant date | May 23, 2017 |
| Priority date | — |
| Expiry date | Apr 13, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Subject matter disclosed herein relates to arrangements and techniques for sending messages directly among processing cores and directly among co-processors over a network-on-chip (NoC). More particularly, the present disclosure provides an Application Specific Integrated Circuit (ASIC) that includes processing cores coupled together with a NoC. Each processing core and co-processor includes two corresponding buffers. A first buffer is for sending messages and a second buffer is for receiving messages. Messages are sent from a processing core directly to another processing core through the NoC. Messages are also sent from a co-processor directly to another co-processor through the NoC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.