Boot strap processor assignment for a multi-core processing unit
US9658861B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2011 |
| Grant date | May 23, 2017 |
| Priority date | — |
| Expiry date | Aug 3, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/177
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Following a restart or a reboot of a system that includes a multi-core processor, the multi-core processor may assign one of the cores as a boot strap processor (BSP). Initialization logic may detect a state of each of the plurality of processing cores as active or inactive. The initialization logic may detect an attribute of each of the plurality of processing cores as eligible to be assigned as a BSP or as ineligible to be assigned as the BSP. The initialization logic may detect a last processing core of the plurality of processing cores in the interconnect that is an active processing core based at least in part on the state and is eligible to be assigned as the BSP based at least in part on the attribute. In various embodiments, the initialization information may assign the last processing core as the BSP.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.