Systems and methods for programming a memory cell having a programmable resistance
US9659647B1 · kind B1 · utility
1Cited by
1References
20Claims
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Key dates
| Filing date | Feb 5, 2016 |
| Grant date | May 23, 2017 |
| Priority date | — |
| Expiry date | Feb 5, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0409
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit for programming a memory cell having a programmable resistance includes a switch. The circuit is configured to apply a programming voltage to the memory cell when the switch is in a first state. The circuit is configured to apply a programming current to the memory cell when the switch is in a second state. The resistance of the memory cell changes from a first resistance state to a second resistance state based on the application of the programming voltage or the programming current to the memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.