Multistate register having a flip flop and multiple memristive devices
US9659650B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 17, 2015 |
| Grant date | May 23, 2017 |
| Priority date | — |
| Expiry date | Feb 17, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B63/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multistate register, comprising: a flip-flop that comprises a first latch, a second latch and an intermediate gate coupled between the first and second latches; multiple memristive devices; and an interface coupled between the multiple memristive devices and the flip-flop; wherein the multistate register is arranged to operate in a memristive device write mode, in a memristive device read mode and in a flip-flop mode; wherein when operating in the memristive device read mode, the interface is arranged to write to a first selected memristive device of the multiple memristive devices a first logic value stored in the first latch; wherein when operating in the memristive device write mode, the interface is arranged to write to the second latch a second logic value stored in a second selected memristive device of the multiple memristive devices; and wherein when operating on a flip-flop mode logic the interface is prevented from transferring values between the flip flop and the memristive devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.