Forming barrier walls, capping, or alloys /compounds within metal lines
US9659869B2 · kind B2 · utility
1Cited by
7References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2012 |
| Grant date | May 23, 2017 |
| Priority date | — |
| Expiry date | Sep 28, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Described herein are techniques structures related to forming barrier walls, capping, or alloys/compounds such as treating copper so that an alloy or compound is formed, to reduce electromigration (EM) and strengthen metal reliability which degrades as the length of the lines increases in integrated circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.