Passivation stack on a crystalline silicon solar cell

US9660130B2 · kind B2 · utility

Assignee

• Institutt for Energiteknikk · NO

Inventors

• Junjie Zhu · Hefei, CN
• Su Zhou · Lo Wu, CN
• Halvard Haug · Oslo, NO
• Erik Stensrud Marstein · Skedsmokorset, NO
• Sean Erik Foss · Skedsmokorset, NO
• Wenjing Wang · Foster City, US
• Chunlan Zhou · Beijing, CN

Key dates

• Filing date: Nov 19, 2014
• Grant date: May 23, 2017
• Expiry date: Nov 19, 2034

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02E10/547
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for manufacturing a passivation stack on a crystalline silicon solar cell device. The method includes providing a substrate comprising a crystalline silicone layer such as a crystalline silicon wafer or chip, cleaning a surface of the crystalline silicon layer by removing an oxide layer at least from a portion of one side of the crystalline silicon layer, depositing, on at least a part of the cleaned surface, a layer of silicon oxynitride, and depositing a capping layer comprising a hydrogenated dielectric material on top of the layer of silicon oxynitride, wherein the layer of silicon oxynitride is deposited at a temperature from 100° C. to 200° C., and the step of depositing the layer of silicon oxynitride includes using N2O and SiH4 as precursor gasses in an N2 ambient atmosphere and depositing silicon oxynitride with a gas flow ratio of N2O to SiH4 below 2.