Successive approximation sigma delta analog-to-digital converters
US9660662B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2016 |
| Grant date | May 23, 2017 |
| Priority date | — |
| Expiry date | Jul 14, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/322
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An A/D converter including first and second A/D converters and a recombination module. The first A/D converter receives an analog input signal, converts the analog input signal to a first digital signal, and includes a successive approximation module, which performs a successive approximation to generate the first digital signal. The second A/D converter converts an analog output of the first A/D converter to a second digital signal. The analog output of the first A/D converter is generated based on the analog input signal. The second A/D converter is a fine conversion A/D converter relative to the first A/D converter. The second A/D converter performs the delta-sigma conversion process and includes a decimation filter that suppresses noise which reduces amplification and power consumption requirements of the first A/D converter and performs a delta-sigma decimation process to generate the second digital signal based on the analog output of the first A/D converter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.