Method and computer-readable medium for dynamically managing power of multi-core processor
US9665161B2 · kind B2 · utility
9Cited by
4References
20Claims
0Family size
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Key dates
| Filing date | Jul 29, 2015 |
| Grant date | May 30, 2017 |
| Priority date | — |
| Expiry date | Jul 29, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and a computer-readable medium for dynamically managing power of a multi-core processor of a computing system are provided. The multi-core processor generates a dynamic voltage and frequency scaling (DVFS) table, determines a first index by alternatively selecting either a power budget or a required performance thereof, determines a current thread level parallelism (TLP) of the computing system, selects one of entries according to the current TLP and the first index, and configure first cores and second cores thereof according to a first settings and a second settings of the selected entry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.