Patent · US Active

Processing apparatus and method of synchronizing a first processing unit and a second processing unit

US9665377B2 · kind B2 · utility

0Cited by

9References

20Claims

0Family size

Assignee

NXP USA, Inc. · US

Inventors

Vladimir Litovtchenko · Ebersberg, DE
Harald Luepken · Tauberbischofsheim, DE
Markus Regner · Munich, DE

Key dates

Filing date	Jul 20, 2011
Grant date	May 30, 2017
Priority date	—
Expiry date	Feb 18, 2033

Classification

Technology area (CPC G)Physics
CPC primaryG06F11/1658
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A processing apparatus, comprising at least a first processing unit and a second processing unit, is proposed. The first processing unit comprises a set of first stateful elements, the second processing unit comprises a set of second stateful elements. A set of synchronization data lines may connect the first stateful elements to the second stateful elements in a pairwise manner. A control unit may control the first processing unit, the second processing unit and the synchronization data lines so as to copy the states of the first stateful elements in parallel via the synchronization data lines to the second stateful elements in response to a synchronization request. A method of synchronizing the processing units is also proposed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.