Semiconductor device and reading method
US9665426B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 19, 2015 |
| Grant date | May 30, 2017 |
| Priority date | — |
| Expiry date | Dec 8, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0411
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to an embodiment, a semiconductor device includes an error corrector, a read controller, and a majority processor. The error corrector is configured to perform error correction on data read from a storage, and output the number of errors contained in the data when errors cannot be corrected by the error correction. The read controller is configured to read pieces of data from a first address in the storage according to respective read conditions, select, from the read conditions, a read condition corresponding to a smallest of the numbers of errors obtained by the error correction performed on the pieces of data corresponding to the respective read conditions, and perform reading from the first address multiple times according to the selected read condition. The majority processor is configured to perform a majority process between a plurality of pieces of data obtained by the multiple times of reading.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.