Zone boundary adjustments for defects in non-volatile memories
US9665478B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 24, 2006 |
| Grant date | May 30, 2017 |
| Priority date | — |
| Expiry date | Oct 24, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory is divided into logical zones by the card controller in order reduce the size of the data structures it uses for address translation. Zone boundaries are adjusted to accommodate defects allowed by memory test to improve card yields and to adjust boundaries in the field to extend the usable lifetime of the card. Firmware scans for the presence of defective blocks on the card. Once the locations of these blocks are known, the firmware calculates the zone boundaries in such a way that good blocks are equally distributed among the zones. Since the number of good blocks meets the card test criteria by the memory test criteria, defects will reduce card yield fallout. The controller can perform dynamic boundary adjustments. When defects occur, the controller can perform the analysis again and, if needed, redistributes the zone boundaries, moving any user data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.