Multi-input tamper detection system
US9665870B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2016 |
| Grant date | May 30, 2017 |
| Priority date | — |
| Expiry date | Jan 29, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/56
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A payment reader includes a tamper detection system for monitoring and protecting against attempts to tamper with the payment reader. The tamper detection system includes tamper detection devices such as tamper switches or tamper meshes, and tamper detection circuitry to control and interface with the tamper detection devices. Pulses are selectively provided from each of a plurality of tamper pins of the tamper detection circuitry to an associated tamper detection device, and a tamper attempt is identified if that pulse is not received at an associated tamper pin. All other tamper pins are switched to an input state, and a tamper attempt is also identified if an aberrant signal is received at the tamper pins while in the input state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.