Apparatus for detecting faults in video frames of video sequence
US9665934B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2015 |
| Grant date | May 30, 2017 |
| Priority date | — |
| Expiry date | Nov 9, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N17/004
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A fault detection circuit for detecting faults in a video sequence includes a multiple input signature register (MISR) with a linear feedback shift register (LFSR) that receives pixel data for pixels in a frame region for video frames of a video sequence and receives a read signal to read the pixel data and shift the MISR; a multiple signature storage buffer (MSSB) that stores frame signatures; and a signature comparator that compares current and reference frame signatures to determine if a fault condition exists in the video sequence. The MISR holds a frame signature for the frame region of the video frame while receiving a frame end signal. The MSSB stores a current frame signature held by the MISR after receiving the frame end signal. The MSSB also stores a reference frame signature. A display processing circuit includes the fault detection circuit. An integrated circuit includes the display processing circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.