Pixel circuit and display
US9666131B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Dec 10, 2013 |
| Grant date | May 30, 2017 |
| Priority date | — |
| Expiry date | Aug 6, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0238
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The pixel circuit includes a first pixel sub-circuit , a second pixel sub-circuit, an initialization module and a data voltage writing module connected to the first pixel sub-circuit and the second pixel sub-circuit; the initialization module is connected to the reset signal terminal and the low potential terminal; the data voltage writing module is connected to a data voltage and a gate signal terminal, and is configured to firstly write a first data voltage to the first pixel sub-circuit and the second pixel sub-circuit and compensate for a driving module of the first pixel sub-circuit, and then to write a second data voltage to the second pixel sub-circuit and compensate for a driving module of the second pixel sub-circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.