Method and circuit for controlling programming current in a non-volatile memory array
US9666243B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 7, 2016 |
| Grant date | May 30, 2017 |
| Priority date | — |
| Expiry date | Oct 7, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/76
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device having: a cross-point memory array; a current supply circuit adapted to supply a programming current to a selected row line of the array during a programming operation to change the resistive state of a selected memory cell coupled between the selected row line and a selected column line of the array; a leakage current detection circuit coupled to the column lines except the selected column line and adapted to detect leakage currents during the programming operation; and a current limit generation circuit adapted to generate a current limit based on the sum of the leakage currents and on a reference current, and to supply the current limit to the current supply circuit to limit the programming current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.